With this summer’s announcement of China’s dramatic shattering of top supercomputing performance numbers using ten million relatively simple cores, there is a perceptible shift in how some are considering the future of the world’s fastest, largest systems. …
As the shift in high performance computing has taken an efficient data-intensive supercomputing turn in recent years, fundamental rethinks in architecture are coming to the fore. …
These days when you talk to people in the tech industry, you will get the idea that in-memory computing solves everything. …
Among the trends that we have been tracking over the course of the year, few others, outside of key processor developments, have attracted more attention than what is happening in the non-volatile memory space. …
For someone like Steve Pawlowski, who spent well over thirty years at Intel working on a wide range of processors for an even more striking array of platforms, it seems only natural to take a cautious view of entirely new approaches to data processing that require a fundamental rethink of computing hardware and software. …
Petar Radokjovic, who leads the memory systems division at the Barcelona Supercomputer Center, described his desk, messy with the latest research on next-generation memory systems for high performance computing, and says that for a time, the sight of them was enough to give him an ulcer. …
There has been quite a bit of talk over the last couple of years about what role high bandwidth memory technologies like the Intel and Micron-backed Hybrid Memory Cube (HMC) might play in the future of both high performance computing nodes as well as in other devices, but the momentum is still somewhat slow, at least in terms of actual systems that are implementing HMC or its rival high bandwidth memory counterpart, High Bandwidth Memory (backed by a different consortium of vendors, including Nvidia and AMD). …
When it comes to systems, the first thing that most people think of is compute. …
The announcement this week by Intel and Micron Technology of 3D XPoint memory, which will sit somewhere between DRAM and NAND flash in future systems, has everyone thinking about the architectural, economic, and performance implications of emerging memory technologies in devices of all kinds – including those humming away in the datacenters of the world. …
It is not an insignificant thing to announce an entirely new class of memory. …
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