There are an increasing number of ways to do machine learning inference in the datacenter, but one of the increasingly popular means of running inference workloads is the combination of traditional CPUs acting as a host for FPGAs that run the bulk of the inferring. …
There is a battle heating up in the datacenter, and there are tens of billions of dollars at stake as chip makers chase the burgeoning market for engines that do machine learning inference. …
This week we have heard much about the inference side of the deep learning workload, with a range of startups emerging at the AI Hardware Summit. …
Gentlemen (and women), start your inference engines.
One of the world’s largest buyers of systems is entering evaluation mode for deep learning accelerators to speed services based on trained models. …
Over the last several years we have seen many new hardware architectures emerge for deep learning training but this year, inference will have its turn in the spotlight. …
FPGAs might not have carved out a niche in the deep learning training space the way some might have expected but the low power, high frequency needs of AI inference fit the curve of reprogrammable hardware quite well. …
Another Hot Chips conference has ended with yet another deep learning architecture to consider. …
Neural networks live on data and rely on computational firepower to help them take in that data, train on it and learn from it. …
Google has been at the bleeding edge of AI hardware development with the arrival of its TPU and other system-scale modifications to make large-scale neural network processing efficient and fast. …
Google created quite a stir when it released architectural details and performance metrics for its homegrown Tensor Processing Unit (TPU) accelerator for machine learning algorithms last week. …
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