Tuning The FPGA For Clouds And Comms
It has been a long time since plain vanilla programmable logic circuits known as field programmable gate arrays have been available in a raw form. …
It has been a long time since plain vanilla programmable logic circuits known as field programmable gate arrays have been available in a raw form. …
Companies invest in platforms over a decade or more, and that is why architectures persist longer than we might think given technological differences and economic forces. …
Not everybody is a hyperscaler or large public cloud builder, and no two companies are happier about that than Dell Technologies and Hewlett Packard Enterprise, the two largest original equipment manufacturers in the world for servers and storage and also the two companies that chased plenty of sales at these webscale datacenter operators in years gone by but which have learned, of necessity, to walk away from deals where they can’t make money or even lose money. …
There is an equally virtuous and vicious cycle that propels all computing: Innovation requires competition to propel it, and competition requires innovation to meet it; repeat or fade. …
Yesterday with the announcement of the forthcoming El Capitan supercomputer, which is set to be more powerful than the top 200 supercomputers combined, we got to thinking about a critical issue that is far less attention-capturing than big performance numbers. …
As the hyperscalers and cloud builders go, so goes the enterprise. …
At this point in the history of information technology, there is no way to introduce a new processor that does not appeal to the hyperscalers and cloud builders. …
At The Next FPGA Platform event in January there were several conversations about what roles reconfigurable hardware will play in the future of deep learning. …
Whatever is going on with its competitive positioning against revitalized X86 server chip rival AMD, Intel clearly felt that it could not wait for the launch of its 14 nanometer “Cooper Lake” and 10 nanometer “Ice Lake” Xeon SP processors to address it. …
At The Next FPGA Platform event in San Jose, California on January 22, Jose Alvarez, Intel PSG CTO, Jose Alvarez outlined the three levels of heterogeneous integration. …
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