For most applications running in the datacenter, a clever distributed processing model or high availability clustering are enough to ensure that transaction processing or pushing data into a storage server will continue even if there is an error. …
For someone like Steve Pawlowski, who spent well over thirty years at Intel working on a wide range of processors for an even more striking array of platforms, it seems only natural to take a cautious view of entirely new approaches to data processing that require a fundamental rethink of computing hardware and software. …
Chip makers and partners Intel and Micron Technology unveiled their jointly developed and manufactured 3D XPoint memory three weeks ago to much fanfare, but it is still perhaps sinking in to system architects and future system buyers how dramatic a move this is and how much it will change the memory hierarchy in systems and the applications that ride on it. …
The announcement this week by Intel and Micron Technology of 3D XPoint memory, which will sit somewhere between DRAM and NAND flash in future systems, has everyone thinking about the architectural, economic, and performance implications of emerging memory technologies in devices of all kinds – including those humming away in the datacenters of the world. …
It is not an insignificant thing to announce an entirely new class of memory. …
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