TSMC Seeks To Make Itself More Indispensable Than It Already Is

Taiwan Semiconductor Manufacturing Co already has a de facto monopoly – one that it has earned – when it comes to the manufacturing of datacenter compute engines. Just about every CPU, GPU, DPU, XPU, and FPGA passes through its wafer etching machinery, and increasingly its chip packaging. Where does it go from here?

And how does it make itself more strategic to customers around the world – and therefore to the nations where they do business – and thus preserve its homeland’s independence détente with China in a world that is using political money and fears of supply chain woes to wean itself themselves off their dependence on TSMC?

Those are tricky questions, and part of the answer, it looks like, is to expand the definition of what a chip foundry is and make TSMC even more indispensable to companies and their governments.

As part of its discussion of its financial results for the second quarter of 2024 ended in June, the top brass at TSMC rolled out a broader definition of the foundry industry and its part in it. Never before has a discussion of total addressable market had such political and economic ramifications.

Since 2018, CC Wei has been chief executive officer at the foundry that is the bedrock of the Taiwanese economy and one of the jewels that makes the island nation so attractive to the Chinese government, was named its chairman back in June. This new Foundry 2.0 definition, which has echoes of how Intel chief executive officer Pat Gelsinger talks about Integrated Device Manufacturing 2.0, includes chip design mask making as well as chip manufacturing, packaging, testing, and other IDM elements.

Under its less expansive way of thinking, TSMC pegged the foundry business at a $115 billion opportunity in 2023. With the new Foundry 2.0 definition, Wei says that TSMC had a 28 percent share of a much larger $247.5 billion market. If you do the math backwards, which Wei did not do, that gave TSMC a 60 percent share of the less expansive foundry business. By expanding its horizons, TSMC is making it look like the world is less dependent upon it – which you have to admit is clever. This new Foundry 2.0 definition is also showing us how the company plans to continue to grow its sales and maintain and possibly extend its profitability in the years to come.

Profitability has been a challenge as Moore’s Law slows and everything is just getting harder and more expensive in the chip business. Between 2005 and now, TSMC has been able to bring an average of 35 percent of its revenues to the bottom line, which is pretty amazing, and it did better than that in from the second half of 2021 through the first half of 2023, when it averaged 41.6 percent. But since the second half of 2023, profitability has been trending slightly downwards, and that is why we have been hearing rumors that TSMC is going to raise the prices for its manufacturing and packaging services – and reasonably so, given the kinds of profits that Nvidia has been able to get selling its datacenter GPUs even before the GenAI boom took off at the end of 2022.

Wei outlined the situation, ever so delicately, thus in a call with Wall Street analysts going over the numbers, and we quote him in full because it is warranted:

“TSMC’s mission is to be the trusted technology and capacity provider for the global logic IC industry for years to come. The continual surge in AI related demand supports a strong structural demand for energy efficient computing. As a key enabler of AI applications, the value of our technology position is increasing as customers rely on TSMC to provide the most advanced process and packaging technology at scale in the most efficient and cost-effective manner.

As such, TSMC employs a disciplined framework to address the structural increase in the long-term market demand profile underpinned by the industry megatrend of AI, HPC, and 5G. We work closely with our customers to plan our capacity. We also have a rigorous roll-out system that evaluates and judges market demand from both a top-down and a bottom-up approach to determine the appropriate capacity to build.

Our capital investment decisions are based on four disciplines, that is, technology leadership, flexible and responsive manufacturing, retaining customers’ trust, and earning a sustainable and healthy return. To ensure a proper return from our investment, both pricing and cost are important. TSMC’s pricing strategy is strategic, not opportunistic to reflect the value that we provide.

Today, we are investing heavily in leading-edge specialty and advanced packaging technologies to support our customers’ growth and enable their success. If customers do well, TSMC should do well. For example, we are happy to see many of our customers’ structural profitability improving in these past few years. At the same time, we face rising cost challenges due to increasing process complexity, a leading load, higher electricity costs in Taiwan, global fiber expansion in higher cost regions, and other cost inflation challenges. Therefore, we will continue to work closely with our customers to share our value. We will also work diligently with our suppliers to deliver on cost performance.

We believe such actions will help TSMC earn a sustainable and healthy return, so that we can continue to invest in technology and capacity to support our customers’ growth and fulfill our mission as a trusted foundry partner, while delivering profitable growth for our shareholders.”

Yup, that sure sounds like a price hike to us. . .

You can’t blame TSMC for wanting more of a piece of the action when it is the only foundry that can seem to get advanced chippery and packaging in the field, and at a price that lets Nvidia get crazy high operating income on datacenter gear – somewhere between 70 percent and 75 percent, we reckon – and then lets cloud builders turn around and sell compute capacity at 65 percent to 70 percent operating margins over the course of four years. TSMC’s operating income tends to be somewhere just a little north of 40 percent.

Maybe TSMC should buy Arm (now armed with Graphcore), build a cloud, and just cut out all of the middlepeople? (You know we sometimes just say stuff to see what it sounds like, mostly for amusement’s sake. . . . )

Anyway, back in reality. In the second quarter, TSMC’s revenues were up 32.8 percent to $20.82 billion, and net income rose by 29.2 percent to $7.66 billion.

As you can see, the 3 nanometer transition is under way and we can expect to start seeing datacenter products (compute engines and switch ASICs) using TSMC’s 3N processes soon. Many datacenter products being sold today are still using the N7, N5, and N4 processes, mainly because of issues with the N3 process.

If the N3 process was mature enough and cheap enough, you can bet that Nvidia would have used it for its impending “Blackwell” B100/B200 GPUs, but instead, it kept to the same 4N process, a variant of TSMC’s 5 nanometer processes and the same process used to make the “Hopper” H100/H200 GPUs that came out in 2023 and 2024, respectively.

This is the fourth quarter that 3 nanometer processes have been in production, and revenues for 3 nanometer chips were up 83.9 percent sequentially from Q1 to $3.12 billion. Chips made with 5 nanometer technologies (including the N5 family and its N4 semi-shrink) accounted for $7.29 billion in sales, up 55 percent year on year and up only 4.4 percent sequentially. Sales of 7 nanometer devices seem to have peaked a quarter ago and were down 1.8 percent year on year and down 1.3 percent sequentially to $3.54 billion. Chips made with older processors and fatter transistors still accounted for $6.87 billion, precisely a third of the TSMC business in Q2 2024.

The smartphone business has been such an important part of making TSMC the world’s merchant foundry that we care about it precisely for that reason. If the smartphone business is doing well, then TSMC can make the investments necessary to create the platforms that can make far more advanced datacenter and PC products, which is what TSMC calls “HPC” in its financial presentations. (Not to be confused with the very tight definition of simulation and modeling that we use when we say HPC here at The Next Platform.)

The smartphone and PC businesses have been in a slump throughout 2023, which made capacity planning tough for TSMC and which has been pinching its profits. In the second quarter, TSMC’s smartphone business rose by 32.8 percent year on year to $6.87 billion, but that was down 4.2 percent sequentially. In the period, the HPC business as defined by TSMC raked in $10,83 billion, up 57 percent compared to Q2 2023 and up 24.7 percent sequentially. This is the first time HPC has broke through $10 billion in sales – but it won’t be the last, we suspect.

TSMC has not talked about how much of its revenues are being driven by AI training and inference chips, but we suspect that it is at least 9 percent of revenues, or about $1.87 billion, which means it would be somewhere around 17 percent of HPC revenues. If TSMC raises prices, that revenue will rise, and you can expect for chip designer/sellers to pass those costs directly onto you.

Given its better visibility into the rest of 2024, given that half of it is over now, TSMC has tightened its capital expense plan to somewhere between $30 billion to $32 billion, which is the upper end of the previous $28 billion to $32 billion range.

Looking ahead, TSMC is expecting revenues for the third quarter ending in September to be between $22.4 billion and $23.2 billion, and for operating margins to be between 42.5 percent and 44.5 percent.

The reason why those profits are not going to be higher is that TSMC has to invest in its N2 2 nanometer and A16 16 angstrom processes, which are going to be used in future products towards the end of the decade. The N2 process is on track with device performance and yields as expected or sometimes better than expected, and volume production will start in 2025, and it will yield 10 percent to 15 percent better performance for the same number of transistors as a device etched in the N3 process, or 25 percent to 30 percent lower power at the same speed as N3. There is an N2P variant that will be used with HPC and smartphone chips, something we might have called N1.8 in earlier times. N2P offers a 5 percent performance or a 5 percent to 10 percent lower power at the same performance as N2.

The A16 process has a new feature called Super Power Rail, or SPR, which is a backside chip power delivery system akin to the one Intel is creating for its 20A, 18A, and 14A processes. A16 will offer 8 percent to 10 percent higher speeds than N2P, or 15 percent to 20 percent lower power at the same speed. Volume production of the A16 process starts in the second half of 2026.

On the packaging front, TSMC more than doubled its CoWoS interposer packaging volume from 2023 to 2024, and by the time this year is over it may more than double it. And looking ahead to 2026, it is saying that it will at least double that CoWoS capacity again.

Now, if we could just get the capacity of 12-high stacks of HBM3E memory and HBM4 memory to quadruple, maybe we could solve the supply issue for all kinds of processors and accelerators.