There are some unique developments afoot at the Barcelona Supercomputing Center (BSC), which stands to reason for the only HPC site to be housed in a former church.
The site will be home to the world’s first RISC-V-based supercomputer, a collaboration underpinned by commercial RISC-V company, SiFive, whom we talked to last week (and which may be in Intel’s acquisition sights). Another RISC-V company has entered the BSC, European Processor Initiative arena.
Cortus, a French semiconductor maker focused on embedded, low power processors, is also poised to stake a claim in the very early days of RISC-V in HPC, although they’ve not managed to get a manufacturable product in line before others who are slated for the RISC-V based BSC exascale system set to appear sometime before 2024, assuming funding holds.
Cortus will be building a complex out-of-order processor core for the European eProcessor project in conjunction with BSC. The company says they will be capable of showing outstanding performance and efficiency compared to x86 architectures with all the same scalability and full cache coherency.
The eProcessor ecosystem combines open source software (SW) and hardware (HW) to deliver the first completely open source European full stack ecosystem based on a new RISC-V CPU coupled to multiple diverse accelerators that target traditional HPC and extend into mixed precision workloads for High Performance Data Analytics (HPDA), (AI, ML, DL andBioinformatics). eProcessor will be extendable (open source), energy-efficient (low power), extreme-scale (high performance), suitable for uses in HPC and embedded applications, and extensible (easy to add on-chip and/or off-chip components), hence, the e used as a wild card in eProcessor proposal name.
The processor will be based on the RISC-V 64-bit ISA and according to Cortus, “offers numerous advantages compared to the common CISC architecture implemented by Intel and AMD.” They add that with RISC-V, “the large number of compiler visible register names, combined with a load/store architecture and absence of memory-t0-memory operations means far fewer memory operations are required.”
“Exploiting the RISC-V Weak Memory Ordering model in conjunction with fewer memory operations allows dynamic execution optimizations which otherwise would not be possible within a Total Store Order approach. This allows a RISC-V processor to surpass Intel/AMD in Instructions Per Cycle (IPC). Further, optimized implementations of atomic memory operations in conjunction with the cache hierarchy improves the performance of multi-threaded applications such as those which run on a large scale HPC system.”
Cortus says they will use this work to create optimized versions for broader datacenter and AI scalable systems all the way down to autonomous and mobile chips.
The company has been around since 2005 but has mostly focused on ultra-low power and embedded devices. They were one of the first members of the RISC-V foundation, which makes given their embedded roots, but as we are learning as of late, RISC-V is seeing a much broader opportunity in the datacenter space with AI as the entry point.
The small but committed ecosystem around RISC-V has been converging around BSC since 2017 with companies like Esperanto and SiFive chasing the prospect of a scalable RISC-V systems story.
The press release Cortus put out today makes it look like the company will be involved with the BSC exascale-class RISC-V supercomputer but our sources tell us this is a completely separate effort as part of the eProcessor program rather than the direct BSC system. It’s more of a stake in the ground for a possible role in datacenter RISC-V processors, in other words.
What is worth noting is that there is some early jockeying for prominence in the very tight-knit RISC-V space that have eyes on the datacenter. Because of RISC-V’s roots, all have foundations in the embedded, low-power device space, which makes us guess there will some bumps in the road for anything large-scale in the future. That’s why, if one had to venture a guess, if there was enough demand from even a few HPC sites or datacenters beyond Alibaba, one of the few datacenter RISC-V users, a company like Intel might have legitimate interest in a SiFive, for example. Although the rumored $2 billion? Seems a tall bet for a user base that won’t emerge for some years yet.