Intel Slows Moore’s Law Pace As Enterprise Spending Tightens
July 20, 2015 Timothy Prickett Morgan
This being the early years of the public cloud buildout, spending on infrastructure in this sector of the economy tends to be spikey and boisterous. Ditto for the high performance computing segment, which tends to rise with new processor and networking advancements and level off until a new technology comes along. Hyperscalers follow their own hockey stick curves up, buying massive amounts of capacity a few times a year. But enterprises – which still account for the lion’s share of IT spending – tend to grow and shrink their spending based on what the gross domestic product is doing wherever they do business.
With China and parts of Europe seeing a slowdown in GDP growth, it is therefore not a big surprise that Intel saw a slowdown in spending in its Data Center Group, which has quickly become the reliable profit engine for the company as the PC market continues its decline. (We would say the PC market is being transformed, and what was once a PC is now sometimes a smartphone or a tablet.)
This slowdown is not causing Intel to slow the pace of innovation for chip manufacturing process technology advancements, but the announcement last week that the company would be stretching out its 14 nanometer process node with a tick–tock–tock pace is coincident with that slowdown, and will allow Intel to extract more revenues from that 14 nanometer node on PCs and tablets for sure and, quite possibly, for servers as well. (More on that in a moment.) It will also allow for Intel to have a smoother transition to 10 nanometer technologies.
In the second quarter, Intel posted $13.2 billion in revenues, down 4.6 percent, and operating income fell a dramatic 24.7 percent to just a hair under $2.9 billion. Thanks to much lower tax payments, net income only fell by 3.2 percent to $2.71 billion. Sales within Data Center Group – which makes chips, motherboards, and selected systems software such as commercial-grade Lustre file systems, and sometimes whole systems for customers – came in at $3.85 billion, up 9.7 percent, but operating profits were only up 1.4 percent to $1.84 billion. As we reported three months ago in our analysis of Intel’s datacenter specific financials for the first quarter, the chip maker’s revenues in the datacenter arena rose by 19.2 percent, but operating profits rose by a more staggering 29.2 percent in the period. If you average this out across the first half of 2015, Intel had 14.1 percent revenue growth for the Data Center Group, which is pretty close to the 15 percent revenue growth target the company has set for all of 2015.
Intel CEO Brian Krzanich said on a conference call with Wall Street analysts last week going over the second quarter financials that the company’s NAND flash business was up more than 40 percent (albeit from a comparatively small number, even though Intel has around 25 percent share of the enterprise flash storage market) and that its fledgling Internet of Things business was up 4 percent, all counterbalancing the effects if the decline in PC chip and motherboard sales and the slowdown in enterprise; importantly, Krzanich said that together, Data Center Group, flash storage, and IoT accounted for almost 40 percent of revenues and more than 70 percent of its operating profit. The IoT Group had $559 million in sales in the second quarter and had an operating income of $145 million, which was flat. Based on these statements, we reckon that these combined units – flash, Data Center Group, and IoT Group – accounted for $5.1 billion in sales in the second quarter, up around 12 percent, and operating earnings for the three only grew by 3 percent to $2.1 billion. If you back out of the model, we peg Intel’s flash storage business at around $670 million in revenues in the first quarter, and we reckon that operating earnings are around $125 million and are keeping pace with revenue growth. However, operating profits for flash look to be well under half what Intel gets from server chips, motherboards, and such.
The weakening in enterprise spending has been a perennial problem for Intel, and also for all IT suppliers. It is just a lot tougher to predict what will happen at 50,000 large enterprises, all dealing with their own realities, than for 3,000 HPC centers and 300 hyperscalers and cloud builders, all of whom have pretty insatiable compute, storage, and networking needs. But it is not all bad.
“The same dynamic that causes the enterprise to be a little bit weaker, those macroeconomics drive businesses and organizations to move their workloads to the cloud,” explained Krzanich. “What I’m seeing is there is a little bit of a counteraction between those two, which is why we have said we believe that overall the year will be, on balance, still growing at that 15 percent. But again, we are looking over the long haul. Don’t get caught by a quarter with this kind of a growth rate.”
Or, for that matter, the one in the first quarter where Intel’s growth was considerably higher than expected.
Krzanich said that while enterprise spending was down in the quarter, spending on Intel components for clouds, networking, and storage were up, and this is the model that Intel is using to project its sales through the end of 2015.
Intel can still hit its numbers if it averages 16 percent growth in the second half of this year. Earlier this year, many had been anticipating a possible “Broadwell” Xeon E5-2600 v4 launch sometime around Intel Developer Forum in August or perhaps during the Supercomputing 2015 conference in November, but the word on the street is that this is not going to happen. We are hearing to expect the Broadwell Xeon E5 launch in the first quarter early next year. The Haswell Xeon E5 v3 processors have plenty of muscle, and while Broadwell offers many advantages, if Intel is going to slow down the pace of Moore’s Law advances in the move from 14 nanometer to 10 nanometer technologies, as Krzanich explained it would do for its Core desktop chips, it makes good sense that Intel would also try to extract as much revenue as possible from the current Haswell chips, which are based on 22 nanometer processes. (Server chips are always behind PC chips when it comes to process; Intel wants to perfect the processes on higher volume, smaller PC chips before implementing it on much larger and more complex server chips.)
Krzanich gave a bit of a history lesson on the call, explaining to Wall Street that when Intel co-founder Gordon Moore penned his eponymous and famous law in 1965, his prediction was for the doubling of transistor density every year for the next decade. And in 1975, Moore updated his projections for the following decade, saying this doubling would take about two years. Process nodes started lengthening in the 2000s, and that is when Intel invented its tick–tock model, with a tick being a process shrink and change in manufacturing technology and a tock being a microarchitecture change in chip design, which in recent years means both tweaking the cores and adding more of them as well as other components that used to be separate items on a system board – memory controllers, peripheral controllers, network interfaces, and such.
“This strategy created better products for our customers and a competitive advantage for Intel,” said Krzanich. “It also disproved the death of Moore’s Law predictions many times over. However, the last two technology transitions have signaled that our cadence today is closer to two and a half years than two.”
Consequently, on its PC chips, Intel is going to roll out a third chip, codenamed “Kaby Lake,” based on its 14 nanometer processes – a second tock, as it were. Intel already launched Broadwell cores in its Core chips earlier this year, which are a tweaked variant of the Haswell cores now in current server chips and older PC chips, and is getting ready to launch its “Skylake” cores next month at Intel Developer Forum if the rumors are right. (The Broadwell PC chips were delayed due to issues with the ramp of the 14 nanometer processes.) The Kaby Lake kicker will be a tweaked Skylake implemented in a 14 nanometer process, which will come out in the second half of 2016. Now, we don’t expect to see “Cannonlake” PC chips based on a 10 nanometer process from Intel until the second half of 2017.
The only reason this matters to server customers is that this means the transition off 14 nanometer processes and to 10 nanometer processes used with Xeon, Xeon Phi, and Atom processors will also, of necessity, take longer. The lag between when a PC chip uses a process and when it gets deployed on a workhorse Xeon E5 chip has been lengthening, too. We know that the Xeon E5 chips do not lag that far behind the PC chips on a given process, and we know Intel already has the 14 nanometer Broadwell Xeon D in the field. But the gap between the high-end Core i7 PC chip and the workhorse Xeon E5 server chip is the one that is probably the best indicator of how long it takes Intel to ramp a process. Take a look at these gaps, as measured in months:
Way back at the beginning of the Great Recession, which changed so many things about the IT market we could write a book about it, the “Nehalem” family of processors were gearing up take on AMD in the PC and server spaces, and ultimately vanquished AMD from the datacenter and created a huge surge in revenue growth for Intel’s Datacenter Group – we are talking about 24 percent to 48 percent growth, depending on the quarter, as we exited the recession in 2010 – and also pushed the company’s operating margins up to the 50 percent range, where they are still at today. The rise of hyperscalers and clouds coincided with the recession ending, and with the downfall of AMD as a server chip supplier and the diminishing of the role of Unix servers in the datacenter as Linux on X86 ascended. (Recessions always do this kind of accelerated phase change for IT, and so do legitimate new ways of doing things, such as distributed computing for both Web and HPC shops in the late 1990s.)
The gap between the launch of a Core i7 chip with the 45 nanometer process and the Xeon 5500 was only four months, but by the “Westmere” generation, that gap increased to seven months. With “Sandy Bridge,” the gap really widened to 14 months, and then “Ivy Bridge” boosted it to 17 months. The “Haswell” generation was nearly as long at 15 months. This is a long time, and we think it is partly due to a lack of serious competition from AMD, the ARM collective, and the few remaining RISC/Unix vendors in the past several years. With “Broadwell,” the PC got pushed out and so has the Xeon server variant by a few months, and the gap has been significantly shortened to only nine months. The “Skylake” PC chips are being pulled in to 2015 and Intel will be shipping Broadwell and Skylake PC chips side by side, but the gap between the Core i7 and the Xeon E5 chip could widen out again to 19 months if the latest Intel server roadmaps, which we told you about back in May, still hold.
If history is any guide, Skylake will offer not just a lot more cores, but also a fairly large improvement in instructions per cycle and better performance per watt. And you can bet that datacenter operators who have thousands to tens of thousands to hundreds of thousands of machines are wishing that Skylake Xeons were already here and not nearly two years away.
Looking out further, Intel has been confident that it can get to 7 nanometer processes for its PC and server chips, and like the IBM Research test chip that was announced a few weeks ago, Intel will be using extreme ultraviolet (EUV) lithography to etch chips in 7 nanometers.
“When we go from 10 nanometers to 7 nanometers, it will be another set of parameters that we will re-evaluate then,” said Krzanich. “We will always strive to get back to two years. And we will take a look at what is the maturity of EUV, what is the maturity of the material science changes that are occurring, what is the complexity of the product roadmap that we are adding, and make that adjustment out in the future.”
Just for fun, we took the rough process roadmap outlined for PC chips and cascaded it forward to cover the Xeon E5 processors for each process node in the table above. Any date shown in orange is an estimate, and for the sake of simplicity, we normalized it at 19 months, which is the gap we expect for the Broadwell generation. We also assumed that there will be a tick-tock-tock for the 10 nanometer generation of processes because Intel, like other chip makers, will need more time to perfect its 7 nanometer processes, which will be using EUV and perhaps exotic metals to do their shrink. Finally, Krzanich said that Intel’s partners and customers wanted it to be “predictable,” so we made the tick–tock–tock absolutely predictable in our model: PC chips come in August and the server chips come out 19 months later in March. This gives three chips in a process generation, and more importantly, it gives Intel a new product line every year, like clockwork.
Given that these caveats, then it is reasonable to assume that Intel can get Xeon E5 v10 processors into the field in March 2022, which is about the same time we expect that Power11 chips might come out using 7 nanometer processes created by IBM, Samsung, and Globalfoundries. This is all idle speculation out past Skylake Xeons, but the point is to show that Intel has a plan that will keep X86 compute on a roadmap for a decade from today if you have three iterations on the 7 nanometer processes. Beyond that, no one can really even venture much of a guess. And yes, we are aware that our model of Intel’s processes puts the jump between initial PC shipments on Core i7-class machines at 14 nanometers and 10 nanometers at 2.7 years and from 10 nanometers to 7 nanometers at 3 years. We think it will stretch a bit more before Moore’s Law breaks.
And, of course, Intel will also have FPGA compute elements once it completes its $16.7 billion acquisition of Altera, which was announced back in June and which we analyzed back in March ahead of the deal going down and then some more after the deal was divulged. Stacy Smith, Intel’s CFO, provided some details on how Intel would come up with the cash to do the deal, details that were not revealed when the acquisition was announced. Specifically, Intel plans to issue $7 billion to $9 billion in long-term debt and finance the rest with cash and short-term commercial paper. By the second half of 2016, he added, Intel would be at a zero net cash position – meaning its cash and debts will balance. As the second quarter of 2015 ended, Intel had $13.9 billion in cash and equivalents in the bank. Intel reiterated its commitment to supporting and enhancing Altera’s ARM-based CPU-FPGA hybrids and its observation that the FPGA maker with the process lead tends to eat market share. Intel wants to have that process lead, and ride the FPGA wave it clearly sees coming – even if it might swamp its Xeon business as much as augment it.