HPC

“Milan-X” 3D Vertical Cache Yields Epyc HPC Bang For The Buck Boost

Last fall ahead of the SC21 supercomputing conference, AMD said it was going to be the first of the major compute engine makers to add 3D vertical L3 cache to its chips, in this case to variants of  the “Milan” Epyc 7003 series of processors that debuted in March 2021 called the “Milan-X” chips.

Control

Slurm HPC Job Scheduler Applies For Work In AI And Hybrid Cloud

The Slurm Workload Manager that has its origins at Lawrence Livermore National Laboratory as the Simple Linux Utility for Resource Management – and which is used on about two-thirds of the most powerful HPC systems in the world – is looking for new jobs to take on across hybrid cloud infrastructure and machine learning systems running at scale.

AI

Teaching Kubernetes To Do Fractions And Multiplication On GPUs

When any new abstraction layer comes to compute, it can only think in integers at first, and then it learns to do fractions and finally, if we are lucky – and we are not always lucky – that abstraction layer learns to do multiplication and scale out across multiple nodes as well as scaling in – slicing itself into pieces – within a single node.