In the past three decades, there has been no shortage of companies with interesting ideas to solve very specific data storage and retrieval problems associated with high performance computing in some form or another. …
Conventional wisdom says that trying to attach system memory to the PCI-Express bus is a bad idea if you care at all about latency. …
It is tough to get excited about mature markets that grow at a steady rate unless it happens to be the most profitable part of the market. …
The jittery economy hasn’t been kind to most semiconductor companies, even those like AMD and Nvidia that are growing in the datacenter. …
The industry is impatient for disaggregated and shared memory for a lot of reasons, and many system architects don’t want to wait until PCI-Express 6.0 or 7.0 transports are in the field and the CXL 3.0 and beyond protocols that ride on it to reach out to external memory have been tweaked to do proper sharing across servers. …
There is a very interesting technical side to IT infrastructure, which we are obviously very keen on exploring here at The Next Platform. …
A decade and a half ago, when Dennard scaling ran out of gas and many of us were starting to first think about what the end of Moore’s Law might look like should that day ever come, a bunch of us were kicking around what it might mean. …
People have been talking about CXL memory expansion for so long that it seems that it should be here already, but with the dearth of CPUs that can support PCI-Express 5.0 peripherals we have to be patient a little bit longer. …
The Hot Chips 34 conference that is normally held at Stanford University is in full swing this week, and thanks to the coronavirus pandemic is being held entirely online. …
If there is one job that system architects are always doing, it is to make highly complex data and the applications that chew on it easier to use, thus making that data more accessible to more people and more applications in an ever-expanding virtuous cycle. …
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