
OpenCL Optimizations Make Case for FPGAs in HPC
The use of FPGAs in HPC is limited less by the capabilities of current hardware and more by the challenges in programming them without sacrificing performance. …
The use of FPGAs in HPC is limited less by the capabilities of current hardware and more by the challenges in programming them without sacrificing performance. …
There has been much written about the potential for FPGAs to take a leadership role in accelerating deep learning but in practice, the hurdles of getting from concept to high performance hardware design are still taller than many AI shops are willing to scale, particularly when GPUs dominate in training and in a pinch, standard CPUs will do just fine for datacenter inference since they involve little developer overhead. …
Last week at the Fujitsu Forum in Tokyo, Lisa Spelman, who is general manager of Xeon products and Data Center Marketing at Intel, did a soft announcement of the hybrid Xeon CPU-Arria 10 FPGA hybrid chip that the company has been talking about for years and that is now available to selected customers. …
Nvidia caused a shift in high-end computing more than a decade ago when it introduced its general-purpose GPUs and CUDA development platform to work with CPUs to increase the performance of compute-intensive workloads in HPC and other environments and drive greater energy efficiencies in datacenters. …
Chip giant Intel has been talking about CPU-FPGA compute complexes for so long that it is hard to remember sometimes that its hybrid Xeon-Arria compute unit, which puts a Xeon server chip and a midrange FPGA into a single Xeon processor socket, is not shipping as a volume product. …
So you are a system architect, and you want to make the databases behind your applications run a lot faster. …
Continued exponential growth of digital data of images, videos, and speech from sources such as social media and the internet-of-things is driving the need for analytics to make that data understandable and actionable. …
Hardware and device makers are in a mad dash to create or acquire the perfect chip for performing deep learning training and inference. …
Every successive processor generation presents its own challenges to all chip makers, and the ramp of 14 nanometer processes that will be used in the future “Skylake” Xeon processors, due in the second half of this year, cut into the operating profits of its Data Center Group in the final quarter of 2016. …
There is little doubt that this is a new era for FPGAs. …
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