TSMC: The Second Most Profitable Company In The AI Revolution

The AI boom has been very, very good to Taiwan Semiconductor Manufacturing Co, which is positioned to do well if Nvidia continues with its hegemony over AI training and inference or if the rebel alliance forms behind AMD or if the hyperscalers and cloud builders dedicate a substantial portion of their capital budgets to etching and packaging homegrown compute engines.

No matter what, TSMC wins.

It is very rare that a company gets into such a fortunate position, with a monopoly that came into existence not only through what we once heard Tony Tjan refer to as “heart, smarts, guts, and luck,” but also through the incompetence and timidity of what used to be TSMC’s substantial and diverse competition only two decades ago. Owning a foundry that can deliver on process and packaging roadmaps at the beginning of the AI revolution would have been a profitable operation for several companies, but being the only one that anyone can trust to make reticle-busting chippery is amazingly profitable. Almost as profitable as selling the AI compute engines themselves. In the trailing twelve months, TSMC has brought 41.6 percent of revenues to the bottom line, which is second only to the 55.8 percent of revenues that is dropping down to net income at Nvidia, the 90,000 pound gorilla in the datacenter.

The fun bit is that profit margin on Nvidia datacenter GPUs is even higher than this average across all products, and we presume that TSMC also charges a lot more to make Nvidia GPUs and makes more profits from them than it does for all of the other chips it makes on behalf of others.

TSMC told Wall Street this week that it shipped 3.26 million wafers in the first quarter of 2025, an increase of 7.6 percent year on year, but its revenues rose by a factor of 4.6X faster (35.3 percent) to hit $25.53 billion. And net income rose even faster at 53 percent year on year to $10.97 billion. That works out to 43 percent of revenue coming to the bottom line, a rate that is five points higher than a year ago and about ten points higher than what it was averaging ten years ago when general-purpose CPU computing was at its height and GPU acceleration had yet to find its killer app.

Most agree that GenAI is that killer app, which is why GPU systems are coming to dominate the aggregate datacenter budgets of the world. But make no mistake, this accelerated system spending is still heavily concentrated at the hyperscalers and cloud builders and is only now showing signs of mainstreaming. And thus far, almost all of the profits from AI compute engines are going to TSMC and Nvidia.

Another piece of evidence: Five years ago, a 12-inch wafer etched with chips average around $4,000 of money for TSMC. Now it is close to double that – and the number of transistors it can put onto a wafer has increased by around a factor of 3X. The increased transistor density alone, you would think, would drive the revenue per wafer by 3X, but vendors have to give some of those Moore’s Law gains back to customers that expect for the cost per unit of function will go down over time.

In the March quarter, TSMC ended the quarter with $81.41 billion in cash in the bank, and that was after spending $10.1 billion in capital expenses building out its foundries in Taiwan, the United States, Germany, and Japan. (The last two are specialty foundries, not mainstream ones.)

The company’s top brass reiterated that they would spend somewhere between $38 billion and $42 billion on capital expenses in 2025, compared to $29.8 billion in 2024 and representing a 34.4 percent increase over last year. Wendell Huang, TSMC’s chief financial officer, said on the call that about 70 percent of that will be for foundry equipment to make chips using advanced processes, and somewhere between 10 percent and 20 percent will be spent on mask making, packaging, and testing and the remaining 10 percent and 20 percent will be spent on “specialty technologies.”

Only a small amount of this money has anything to do with the $100 billion in additional investments in foundries and a research center in Arizona that TSMC chief executive officer CC Wei announced with the Trump administration back in early March. TSMC had already committed $65 billion to build three fabs in Arizona. The extra $100 billion will build three more foundries, two chip packaging facilities, and a research and development center outside Phoenix. The first fab has been in production on the N4 4 nanometer process since Q4 2024 and has yields comparable to that of its fabs in Taiwan. The second fab is already build and will focus on N3 3 nanometer technologies, and TSMC is trying to ramp production on it now. The third fab will focus on N2 2 nanometer processes, the fourth fab will use 1.6 nanometer A16 processes, and the fifth and sixth fabs will make use of processes with even smaller transistor features. Wei said that about 30 percent of TSMC’s total 2 nanometer etching capacity will be located in Arizona.

TSMC expects for volume production of the N2 process to start in the second half of this year at its  Hsinchu and Kaohsiung foundries in Taiwan. As for that N2 process, Wei added that the number of new tapeouts for N2 during its first two years would be higher than for N3, which was higher than for N5. The use of N2 will happen across the board with CPUs, GPUs, switch ASICs, and other chips in the datacenter  as well as for smartphones and high performance CPUs. N2 will yield 10 percent to 15 percent faster performance for transistors at the same power draw or the same performance for 20 percent to 30 percent lower power. The A16 process, which will hit volume production in the second half of 2026, yielding 8 percent to 10 percent more performance than the tweaked N2P process that is also in the works, or a reduction of 15 percent to 20 percent lower power compared to N2P.

TSMC said it was feverishly working to double its CoWoS interposer technology, which among other things, is used to connect HBM stacked memory to high performance compute engines. The demand for CoWoS was “almost insane and much, much higher than we can prepare” last year, and it is getting a bit better. Wei added that he expected for CoWoS supply to be a more balanced with demand in 2026.

Driven by AI accelerators as well as high performance CPUs and switch ASICs, the so-called HPC sector at TSMC (which is not restricted to traditional HPC simulation and modeling workloads as we use that term in this publication) drove $15.1 billion in sales in Q1, up 73.5 percent. Smartphones, which drove the TSMC business for so long and the front-end of the technology wave. Is now less than half that of the HPC sector as TSMC defines it.

In our model, we reckon that AI training and inference datacenter product sales drove about $6 billion of TSMC’s sales, which means it was around 40 percent of HPC segment revenues and 23.5 percent of total revenues. If conditions persist, it will not be long before half of TSMC’s revenues are driven by AI accelerators, which means it will be the majority of HPC segment sales for the company.

Wei reiterated that TSMC expects to double its AI-related chip revenues this year, despite export controls on GPUs and other devices to China instituted by the United States government. Our model has TSMC driving $13.1 billion in AI chip sales for etching and packaging in 2024, and that it will grow to $27.6 billion this year. That’s 2.1X growth. As far as we can tell, $6 billion of that $27.6 billion has already been booked in Q1 2025.