Machine Learning for Future System Designs

As an engineering director leading research projects into the application of machine learning (ML) and deep learning (DL) to computational software for electronic design automation (EDA), I believe I have a unique perspective on the future of the electronic and electronic design industries.

The next leap in design productivity for semiconductor chips and the systems built around them will come from the fusion of fully integrated EDA computational software tool flows, the application of distributed and multi-core computing on a broader scale and ML/DL. The current wave of artificial intelligence (AI) and ML innovation began with improved GPU computing capacity and the smart engineers who figured out how to harness it to accelerate deep neural network training. AI/ML will play a key role in the design of next-generation platforms, enabling the proliferation of today’s technology drivers including 5G, hyperscale computing and others.

In my role, the fun comes from the numerous non-deterministic polynomial (NP)-hard and NP-complete problems that exist at every stage of the design and verification process. My colleagues and I develop the software that engineers use to design, simulate and verify integrated circuits, packages, boards and systems. Our design challenges are intractable and complex enough that there is no known way to find the optimal solution in a feasible amount of time. Our verification challenges are by definition unbound problems that are “never done” and are uniquely suited for AI and ML to drive faster convergency to better coverage. What is exciting about EDA is the variety of complex algorithms and software we have developed to achieve solutions that are close to optimal. At Cadence, we call that set of complex algorithms computational software, and for the last 40 years, these innovations have driven design productivity improvements for our customers.

Numerical solvers, Boolean satisfiability solvers, adaptive meshing, computational geometry and iterative improvement optimization algorithms are all examples of computational software. Computational software algorithms require the EDA software engineer to determine how to best apply the algorithms to the current design challenge, as well as how to present the various meta-parameters, controls and commands to the user in their own design terms. The next-generation trends that are driving additional complexity into system design and verification will require new computational software “tools” in the toolbox for EDA to continue to deliver additional leaps in productivity.

Those of us across the electronics industry who have been working from home for the past six months have benefited from advances in cloud computing, silicon optimization and the internet. In a virtuous feedback loop, computational software has helped enable the design of ML accelerators today, and we, in turn, will benefit from them in our future innovations. 5G, hyperscale computing and other technology drivers will require a vast number of new innovations in chip, package, board and system designs to create the full range of future electronic possibilities. The ML capability of learning-by-example is a new computational software tool that builds the foundation of the next round of innovation in designer productivity.

Computational software has enabled tremendous growth in both productivity improvement and addressing complexity challenges of electronic system designs. As our solutions addressed the challenges of the last generation, it has enabled ever more sophisticated designs at the next generation. The ever-increasing growth in system complexity has also led to complexity in the design and verification flows. This flow complexity has become a barrier to continued changes in the flow to adopt new best practices or automation. Each tool or step in a complex flow—adding new options, commands and capabilities—requires a user to understand them, evaluate them and check to see their fit in the user’s overall flow before adoption. Having the capability to deploy ML to learn design practices by example from users and letting the EDA software engineer develop a system to translate from the ML-learnt design practice to options on a new tool flow accelerates the adoption of innovative design flows.

For example, an analog circuit designer knows which devices to match in circuit design and layout based on experience, but to add automation to the design flow, they must add extra constraints and specifications. ML models can learn those designer-specific best practices from completed designs and accelerate the entire design flow in a customized way for each designer or design team. However, design practices are not like image recognition. Innovative system design companies will not share their past designs, or the ML models trained from them with other companies. As such, the training of ML-learnt design practices must happen behind the user’s firewall, by EDA users who may not be ML experts. Therefore, ML deployment as a key tool in the EDA computational software toolbox is unlikely to look the same as many SaaS ML-based offerings in other industries.

Other than learning design practices by example, the most common use case for ML in EDA will be predicting future flow steps. When each of these NP-complete problems chain together, it is difficult to fully predict the impact of the current flow step’s result on the next step. The most common example is understanding routability while optimizing placement. Placement determines the location of each component, usually with the goal to minimize area/cost and wire length. Routing makes the connection for each signal between each component. These components might be parts on a PCB or blocks or transistors on a chip. EDA engineers developed many heuristics over the years to improve wire length and routability while optimizing placement. But as routing and placement are NP-hard problems, it is inherently computationally infeasible to attempt to fully route every candidate placement, and existing heuristics may miss many subtleties of routability.

By using a machine learning model with the placement as input and routability scores as output, we can potentially create a much richer, faster solution. The EDA tool flow can generate many candidate placements, route each of them and use the routing score as the label to train the ML model. Similarly, any flow generating many design candidates and results by running the complex EDA flow can build models to predict the results of future flow steps from earlier step inputs. This provides tremendous power in the ability to find better solutions in complex design spaces.

EDA provides the key computational software that enables the design and verification of complex intelligent systems. The generational technology drivers underway now will lead to many new and innovative designs. To unleash the creative power of system designers, EDA tools will adopt ML as a key capability to drive even higher productivity. This will enable design flows to find even better solutions and allow the design flows to automatically customize themselves to the designers and design teams. Thus, ML is a crucial component in the creation of the next system designs and platforms for the future.

About the Author

Elias Fallon is currently Engineering Group Director at Cadence Design Systems, a leading Electronic Design Automation company. He has been involved in EDA for more than 20 years from the founding of Neolinear, Inc, which was acquired by Cadence in 2004. Elias was co-Primary Investigator on the MAGESTIC project, funded by DARPA to investigate the application of Machine Learning to EDA for Package/PCB and Analog IC. Elias also leads an innovation incubation team within the Custom IC R&D group as well as other traditional EDA product teams.

Beyond his work developing electronic design automation tools, he has led software quality improvement initiatives within Cadence, partnering with the Carnegie Mellon Software Engineering Institute. Elias graduated from Carnegie Mellon University with an M.S. and B.S. in Electrical and Computer Engineering. Elias, his wife and two children live north of Pittsburgh, PA.

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