DARPA’s $200 Million JUMP Into Future Microelectronics

DARPA has always been about driving the development of emerging technologies for the benefit of both the military and the commercial world at large.

The Defense Advanced Research Projects Agency has been a driving force behind U.S. efforts around exascale computing and in recent years has targeted everything from robotics and cybersecurity to big data to technologies for implantable technologies. The agency has doled out millions of dollars to vendors like Nvidia and Rex Computing as well as national laboratories and universities to explore new CPU and GPU technologies for upcoming exascale-capable systems that hold the promise of 1,000 times the performance of current supercomputers.

Two years ago DARPA sponsored the Cyber Grand Challenge competition at the DefCon security conference to find the best autonomous computer security solution, and last year selected Intel, Qualcomm, Northrop Grumman, Georgia Tech and the Pacific Northwest National Lab for its Hierarchical Identify Verify Exploit (HIVE) program, aimed at creating a graph analytics processor to more efficiently analyze data and to improve the competitiveness of U.S. companies as well as national security.

The agency unveiled its Neural Engineering System Design (NESD) program to help develop an implantable computing system that will enable communications interface between the brain and the digital world by converting electrochemical signals in neurons in the brain into the ones and zeros that drive computer programs. In 2017, DARPA handed out contracts to a range of institutions to pursue the effort, including Brown University, Columbia University, and the University of California Berkeley, as well as Fondation Voir et Entrendre, John B. Pierce Lab and Paradromics.

Most recently DARPA has made a push into the microelectronics area. The agency and a consortium of industry partners – which include semiconductor companies Intel, AMD, Arm, IBM, Analog Devices, Micron, Samsung and Taiwan Semiconductor Manufacturing (TSMC) as well as companies Raytheon, Northrop Grumman, Lockheed-Martin and EMD Performance Materials – launched the JUMP (Joint University Microelectronics Program) in November 2016, a $200 million initiative over up to five years that researchers hope will result in new classes of electronics systems that are higher performing and more efficiency than current systems and that will have broad applicability for both military and commercial applications. JUMP is part of DARPA’s larger Electronics Resurgence Initiative (ERI), a four-year effort that will span four years and hundreds of millions of dollars to improve electronics performance beyond simple scaling. DARPA is putting in about 40 percent of the funding; consortium partners are providing the other 60 percent.

According to the non-profit Semiconductor Research Corp. (SRC), which is acting as the administrative organization, the public-private JUMP project is aimed at giving the Department of Defense a technological edge over other countries in such areas as advanced radar, communications and weapons, while driving commercial IT development in the industrial sector. The idea is to drive the development to microelectronics-based technologies that will be needed by the DoD, national security agencies and commercial companies in the years 2025 through 2030.

Part of the JUMP strategy was to create six research centers around the country comprising more than 30 researchers from U.S. universities. DARPA and SRC last month announced the research centers, which were selected from a range of proposals submitted last year and touch on a range of areas, including artificial intelligence (AI), autonomous systems, cellular technologies, networking, nanotechnologies, hardware and software design and memory.

“Through these university teams, we’re seeking innovative solutions to tough technical challenges so that we can overcome today’s limitations in the performance and scalability of electronic systems,” Linton Salmon, DARPA’s program manager for JUMP, said. “This in turn will open the way to technologies that dramatically boost the warfighter’s abilities to sense the environment, process information, and communicate.”

The research facilities include the Center for Research on Intelligence Storage and Processing-in-memory, which will be led by Kevin Skadron, professor and chair of the University of Virginia’s Department of Computer. The goal of the center is to remove the barrier that separates storage and memory, which makes accessing data slower than necessary and inefficient. The researchers are being tasked with build compute processing capabilities into memory storage at the chip level and match processors and memory chips in 3D stacks. The idea is that this will enable users to run computations on huge amounts of data, which will help drive innovations in everything from national security to medical research.

Another site, the Applications Driving Architectures (ADA) Center, will look to create a modular approach to hardware and software design that will result in a plug-and-play ecosystem that will make it easier to develop new systems by reducing the skills needed. By doing this, the talent pool of designers will grow and hopefully drive new ideas. The ADA Center will be led by Valeria Bertacco, a professor at the University of Michigan. The Applications and Systems-driven Center for Energy-Efficient Integrated Nanotechnologies (ASCENT) will look to address the expected limitations to CMOS technology – the anticipated end of Moore’s Law may fit in here – and the researchers at the center will focus on such areas as novel integration possibilities, device technologies and the use of hardware accelerators to improve the performance, efficiency and capabilities of future compute systems. HPC and enterprise systems are continuing to adopt accelerators like GPUs from Nvidia and AMD and field-programmable gate arrays (FPGAs) from Intel and Xilinx to improve performance while holding down power consumption. ASCENT will be led by Suman Datta, an engineering professor at Notre Dame.

The Center for Brain-inspired Computing Enabling Autonomous Intelligence (C-BRIC), led by Kaushik Roy, a electrical and computing engineering professor at Purdue University, will working on semiconductor technologies that will address the performance and power demands that will come from future machine learning applications. The idea is to deliver new innovations for upcoming AI-driven autonomous systems, like self-flying drones through the development of neuro-inspired algorithms, hardware fabrics and applications.

Other centers will look into technologies for future cellular networks that can handle the expected data demands that will come from the rise of autonomous vehicles and efficient highways and networking at the network edge and into the cloud, a push driven by the rise of the Internet of Things.