The running joke is that when a headline begs a question, the answer is, quite simply, “No.” However, when the question is multi-layered, wrought with dependencies that stretch across an entire supply chain, user bases, and device range, and across companies in the throes of their own economic and production uncertainties, a much more nuanced answer is required.
Although Moore’s Law is not technically dead yet, organizations from the IEEE to individual device makers are already thinking their way out of a box that has held the semiconductor industry neatly for decades. However, it turns out, that thought process is complicated just as much by technical challenges as it is by economic barriers.
As noted last week in our exploration of the IEEE roadmap effort, which seeks what lies beyond Moore’s Law architecture-wise for a wide range of critical workloads, others are considering similar questions. For some organizations, including the Global Semiconductor Alliance (GSA) and its member organizations, one answer to the post-Moore’s Law conundrum lies in pushing the future of open source hardware. While this can come with its own technical hurdles when compared to what the very few large chipmakers produce, the economics, once followed with the right support models to make such architectures viable in enterprise, will follow suit.
As Jerome Nadel, whose company, Rambus, sponsored a GSA recent report that looks to the future of the industry with open source hardware at the base (as well as other approaches, including reprogrammable devices like FPGAs and custom ASICs) tells The Next Platform, “The semiconductor industry is not growing; there has been unparalleled consolidation and money spent on acquisitions recently, and all of this is coming from the fact that this is a non-growth market. The industry is only reaping 1.5 percent of the billions in value it creates, so what we are asking is what alternative paths exist.”
Nadel, who works for GSA member company, Rambus, thinks that one potential route is to push the future of open source hardware. Hewlett-Packard Enterprise, Oracle, and others see value in RISC-V, but of course, there are other approaches that are trying to get a foothold, especially in the server market. The device and IoT market are awash in open source hardware options already, but for new devices to become adopted, this means a support angle needs to be firmed up, similar to what Red Hat did with Linux—a move that made Linux overall a more viable option in the enterprise datacenter.
Worldwide chip sales increased by nearly 50 percent during the last decade, with industry revenue peaking at $340 billion in 2014. While those might sound like dramatic growth figures, the numbers mask an even more important story that really started to play out last year. Gartner figures estimate that the worldwide chip sales went down 1.9 percent in 2015, and the 2016 estimate shows only a slight, optimistic 1.4 percent increase. Further complicating the market is the increase in acquisitions and consolidations, driven by the fact that only a few can compete given extraordinarily high design and fabrication costs, as seen in the chart below.
According to the GSA, “Chip design projects that once cost a few tens of millions of dollars a decade ago have climbed as much as $200 million. Growth in the number of IP blocks, use cases, and fuse configurations also create complex schedule risks and logistics challenges for chipmakers.” Further complicating the economics for would-be chipmakers is the fact that M&A activity went up significantly in 2015, “fueled in part by historically cheap financing that enabled more than $4 trillion of worldwide corporate deal making. Semiconductor M&A also reached unprecedented levels last year, with chip-sector deals worth a combined $117.1 billion announced. This figure is more than five times the $19.9 billion total value of transactions in 2014.”
As Nadel tells us, “we find that investments in software continue to grow, but in microhardware, this is not the case. The margin erosion is severe, investments in the costs and design and fabrication are now so enormous that the notion of ‘build it once and reap the benefit’ is one that is not sustainable as costs go up and margins go so far down.” To counter this trend, he says, the only real options lie in custom ASIC and FPGAs, but more broadly in the future of open source hardware, which has proven successful for smaller devices (see the chart below) but still has a ways to go on the server side.
As a founding member of the RISC-V organization, which is providing one route to offer true open source building blocks for an open hardware future, Nadel says his company is seeing where other paths fall short, especially when it comes to support. While there are indeed several other efforts that were not highlighted on the chart above that represent what’s happening with open source architectures for servers, Nadel says the reason his company is backing the RISC-V effort is because of the sheer economics of novel instruction set architectures (ISAs). “Commercial chip vendors typically pay hefty, multi-million dollar license fees to use proprietary ISAs. However, such prices are often too high for academia and many small companies, leading to stifled competition and innovation as well as more expensive chips.”
The open source RISC-V effort, with designs that support up to 128-bit memory addressing, has wide potential and is fully open source, and now has support from more recent members of the organization, including Google, HPE, Lattice Semiconductor, Oracle, and others as well as a story of major progress with the 64-bit Shakti processor out of IIT Madras, which now has plans for at least six microprocessor designs along with fabrics and an accelerator chip.
The problem, and the reason why the answer might still be a “no” when it comes to cracking the tough economic nut of the semiconductor industry, boils down to ecosystems and support. However, if there are any promising efforts towards a true open source ISA alternative, the RISC-V effort is one to watch. This is not something that appears to have enough momentum to topple any giants in the next year or two, but gauging from the IEEE’s tone toward the industry and its new paths and market conditions, something has to give. The question is where financing and support will come from.
On a much broader level, and bringing all of this home to the original question, we will continue to live in an X86 dominated industry for the near future. As open source hardware efforts, including ARM and OpenPower, which offer some (but not full) control (as RISC-V does) make their own strides in the server market, Intel is responding with an increasingly diverse product line. Consider that when Haswell launched, there were 29 products for servers with an additional 22 custom chips based on the needs of hyperscale companies and other very large customers. In short, as the opportunities for customization and control are extended by open source efforts, chip giants like Intel are looking to their largest customers and giving them similar flexibility and choice without making them do the legwork of building support internally around an ISA.
Just as we described the value proposition for chip makers being upended, users will have to consider their own cost-benefit scenarios. For large customers, is it easier to let Intel figure out the nitty-gritty while still getting a tailored processor for a specific workload; is it easier rather to have “some” control by building with ARM or OpenPower blocks? And when it will make sense for an entire industry to get behind an entirely new open source ISA that offers unlimited potential for users–even if the support for such a shift isn’t in place? That final piece is the RISC-V question we’ll explore in more depth this year.
At this inflection point in the economic viability of what comes next, where process saturates at infinity on the physical limits of scaling, 2D, 2.5D, 3D, stacks, wafer and memories scale, on new forms of integrated systems in package the key consideration economically is the mass leverage to transit a jump gate through dark space into a new industrial paradigm.
Economically the means to do this are earned over the economic life of any technology.
Consider the traditional U cost curve where at innovation moving into adaptation costs begin high to achieve that margin capable for further development. At adoption into early growth where learning and scale deliver cost optimizing techniques enabling marginal improvement. Through peak growth now entering the valley of the fabless where efficient utilization of the industrial resource delivers lowest input cost for highest marginal reward. Entering industrial maturity where effective utilization of production resource sustains margin managing the complexities of increasingly costly developments that are drivers of growth. Finally at saturation where cost of input’s to sustain the weight of the incumbent industrial endeavor, mass of the cluster, ecosystem or compliment again nears the abyss of its own marginal productivity.
Where the skills and productive technique of any commercial industrial art now transit not forward, but back in time to the applied sciences; where costs are again high and margins again fleeting.
The economic key to this inflection point is the financial inertia to transit the jump gate.
A question then emerges over the life of any technology. What is the socially acceptable rate of savings to sustain industrial productivity? That financial momentum massed capable of renewed vigor of the applied science dedicated to this transition into new space?
Through the CMOS/SOI industrial regime, moving into a future time opportunity, on the wants of man over the industrial social good the fact is, on meticulous scrutiny in this examination, very few did.
Obvious incumbents on their prior spend may not have the momentum to make it.
Where the new industrial paradigm may also bring with it the new industrial order. That I hope, economically, is more socially inclined than the present, truly delivers on the best practices of corporate responsibility, demonstrates enterprise wide employee ethics, supports legitimate science on productive endeavors aimed to revitalize commerce and the commercial art through industrial management best practice.
Mike Bruzzone, Camp Marketing
Hi Krste,
Good, thoughtful article.
I look forward to see how RISC-V specifically and open hardware generally evolve.
One detail: What’s the source for 22 custom server versions of Haswell for hyperscalers. I found it interesting. If true, it’s a great proof point that despite projects like Open Compute, data center requirements are still very fragmented.
Best
Open source semiconductor will be inevitable but it will be led by hackers and communities rather than the corporate sector. The corporate sector is just too busy making money. Only really passionate hackers will lead this way. There are already 3d printers and 3d genomic printers that can print dna. Semiconductors aren’t too far behind. Things will get bigger not smaller. My vision is that a kid can dream up of a custom ic and have it delivered to his home for $10 that he can tinker with and do really cool but impractical stuff. This is what will bring the new Steve Jobs when the ic making can be printed out. And there is also kickstarter as well. Well thats my hope anyway.